Throughout this course, you will be introduced to Pathway for Assembly and Packaging technologies for 7-nanometer silicon feature sizes and beyond. The course will present the evolution and impact of packaging on product performance and innovation. Specifically, we highlight how packaging has enabled better products via the use of heterogeneous integration by improving the interconnects for thermal management and signal integrity.
Advanced Semiconductor Packaging
Advanced Semiconductor Packaging
This course is part of Semiconductor Packaging Specialization
Taught in English
Instructor: Terry Alford
Included with 
Course
Gain insight into a topic and learn the fundamentals
4.6
(18 reviews)
Beginner level
No prior experience required
6 hours (approximately)
Flexible schedule
Learn at your own pace
What you'll learn
Introduction to Pathway for Assembly and Packaging technologies
The evolution and impact of packaging on product performance and innovation.
Skills you'll gain
Details to know
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Assessments
4 quizzes, 1 assignment
Course
Gain insight into a topic and learn the fundamentals
4.6
(18 reviews)
Beginner level
No prior experience required
6 hours (approximately)
Flexible schedule
Learn at your own pace
See how employees at top companies are mastering in-demand skills
Build your subject-matter expertise
This course is part of the Semiconductor Packaging Specialization
When you enroll in this course, you'll also be enrolled in this Specialization.
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There are 6 modules in this course
Welcome to Advanced Packaging! Throughout this course, we will introduce you to Pathway for Assembly and Packaging technologies for 7-nanometer silicon feature sizes and beyond. We will present the evolution and impact of packaging on product performance and innovation. Specifically, we highlight how packaging has enabled better products via the use of heterogeneous integration by improving the interconnects for thermal management and signal integrity. Thank you for joining us & we hope you enjoy the materials!
What's included
1 video2 readings
In this module you will have an opportunity to view a lecture video by Ravi Mahajan who is an Intel Fellow and the Director of Pathfinding for Assembly and Packaging technologies for 7-nanometer (7nm) silicon and beyond in the Technology Development and Manufacturing Group at Intel Corporation. In this module Dr. Mahajan will discuss the evolution and impact of packaging on product performance and innovation. He shows how packaging has enabled better products using heterogeneous integration (HI) by improving the interconnects, signaling, power delivery and thermals over the years.
What's included
1 video1 reading1 quiz
In this module you will have an opportunity to view a lecture video by Dr. Ravi Mahajan, Intel Fellow. In this module Dr. Mahajan will discuss how advanced packaging technologies enable the integration of diverse components and functionalities into microelectronics systems. You will learn about the importance of advanced packaging for the future of computing and communication.
What's included
1 video1 reading1 quiz
In this module you will have an opportunity to view a lecture video by Dr. Ravi Mahajan, Intel Fellow. In this module Dr. Mahajan will discuss how interconnect scaling can enable complex multi-chip packages (MCPs) that combine different types of chips and technologies. You will learn about the various interconnect options and trade-offs for MCPs, and how blending 2D and 3D architectures.
What's included
1 video1 reading1 quiz
In this module you will have an opportunity to view a lecture video by Dr. Ravi Mahajan, Intel Fellow. In this module Dr. Mahajan will discuss the trends in interconnect scaling for microelectronics systems. You will learn how 2D and 3D die-to-die (D2D) interconnects can enable high performance, how D2D link standardization can facilitate systematic and modular design of multi-chip packages (MCPs), and how co-packaging optics can address the challenge of off-package bandwidth scaling in future systems.
What's included
1 video1 reading1 quiz
In conclusion of Advanced Packaging, we would like to summarize the main takeaways. Starting with Pathway for Assembly and Packaging technologies, we discussed trends in interconnect scaling of microelectronics systems 7-nanometer (7nm) silicon and beyond. During our presentations, we saw how 2D and 3D die-to-die (D2D) interconnects can enable high performance and can facilitate the systematic and modular design of multi-chip packages (MCPs). Turning to the future, we estimated how co-packaging optics could address the challenge of off-package bandwidth scaling in future systems.
What's included
1 video1 assignment
Instructor
Instructor ratings
5.0 (6 ratings)Offered by
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